TIMER Controller

The TIMER controller manages system clocks, watchdog and RTC

Driver sources

Registers

Interrupt?

0x0000 IntCtl

0x0004 IntSta

Timer0

0x0010 Tmr0Ctl

0x0014 Tmr0IntVal

0x0018 Tmr0CntVal

Timer1

0x0020 Tmr1Ctl

0x0024 Tmr1IntVal

0x0028 Tmr1CntVal

Timer2

0X0030 Tmr2Ctl

0x0034 Tmr2IntVal

0x0038 Tmr2CntVal

Timer3

0x0040 Tmr3Ctl

0x0044 Tmr3IntVal

Timer4

0x0050 Tmr4Ctl

0x0054 Tmr4IntVal

0x0058 Tmr4CntVal

Timer5

0x0060 Tmr5Ctl

0x0064 Tmr5IntVal

0x0068 Tmr5CntVal

Avs

0x0080 AvsCtl

0x0084 Avs0Cnt

0x0088 Avs1Cnt

0x008C AvsDiv

Watchdog

0x0090 DogCtl

Watch dog control.

Bit # * 12:1 Magic number. write 0xA57 to enable wtd reload * 0 write 1 to reload

0x0094 DogMode

Watch dog mode.

Bit #

  • 7:2 Interval in seconds 0-23
  • 1 Reset system when counter reaches 0
  • 0 Enable

Note: The watchdog timer is automatically reloaded if fully stopped.

Note: To stop the watchdog write 0 to enable bit and wait a little.

Cnt64

0x00A0 Cnt64Ctl

0x00A4 Cnt64Lo

0x00a8 Cnt64Hi

RTC

0x0100 LoscCtl

0x0104 RtcYMD

0x0108 RtcHMS

0x010c RtcDHMS

0x0110 AlarmWHMS

0x0114 AlarmEn

0x0118 AlarmIrqEn

0x011C AlarmIrqSta

TmrGpReg

0x0120 TmrGpReg1

0x0124 TmrGpReg2

0x0128 TmrGpReg3

0x012C TmrGpReg4

0x013c CpuCfg

CPU configuration

Bit #

  • 6-7 Chip version. 00 = A, 11 = B, ?? = C