A10 SATA controller
The SATA controller is an AHCI controller with some small twists.
The code can be found here: https://github.com/amery/linux-allwinner/commit/5080a650d1c91e6da2f29d4480bbf7e44b08cfad
From the driver code the only hw specific changes seems to be
- PHY control driver
- DMA setup using vendor specified port register 0x70 (SW_AHCI_PORT_DMA in the code) setting bits 8-15 to ox44 before each DMA transfer.
AHCI Controller Registers
Port 0 starts at 0x0100. All offsets below are relative to the port base.
Related to DMA setup somehow. Code writes 0x44 in bits 8-16 before starting DMA transaction.