Allwinner A10 register guide

This page aims at documenting the known Allwinner A10 I/O registers. Any addresses in this document is using physical addressing.

How to contribute

Copy register information from headers in the kernel & u-boot sources, and hunt down what it means by reading how the registers are used in the sources. Where applicable try to discover more details by playing with the registers, for example by using md.l / mw.l commands from u-boot.

Please DO NOT copy information from the Allwinner User Manuals. Focus of this wiki is to fill in the missing pieces, not a substitute for the User Manuals. Documenting differences between the CPUs based on information from the manuals are OK.

User manuals can be found at http://dl.linux-sunxi.org/

Memory map sources

• https://github.com/hno/u-boot/blob/sun4i/arch/arm/include/asm/arch-sunxi/cpu.h
  
• https://github.com/amery/linux-allwinner/blob/allwinner-v3.0-android/arch/arm/mach-sun4i/include/mach/platform.h

Memory map

• 0x00000000-0x00003fff 16KB ?SRAM A1
• 0x00004000-0x00007fff 16KB ?SRAM A2
• 0x00008000-0x0000b3ff 13KB ?SRAM A3 (EMAC)
• 0x0000b400-0x0000bfff 3KB ?SRAM A4 (EMAC)
• 0x00010000-0x00010fff 4KB ?SRAM D (USB0)
• 0x00020000-0x0002ffff 64KB ?SRAM B (secure)
• 0x01c00000-0x3fffffff ??KB I/O
• 0x01c00000-0x1c000fff 4KB ?SRAMC
• 0x01c01000-0x1c001fff 4KB DRAMC
• 0x01c02000-0x1c002fff 4KB ?DMA
• 0x01c03000-0x1c003fff 4KB NAND
• 0x01c04000-0x1c004fff 4KB ?TS
• 0x01C05000-0x01C05fff 4KB ?SPI0
• 0x01C06000-0x01C06fff 4KB ?SPI1
• 0x01C07000-0x01C07fff 4KB ?MS
• 0x01C08000-0x01C08fff 4KB ?TVD
• 0x01C09000-0x01C09fff 4KB ?CSI0
• 0x01C0A000-0x01C0Afff 4KB ?TVE0
• 0x01C0B000 EMAC Ethernet Controller
• 0x01C0C000 ?LCD0
• 0x01C0D000 ?LCD1
• 0x01C0E000 VE
• 0x01C0F000 MMC0
• 0x01C10000 MMC1
• 0x01C11000 MMC2
• 0x01C12000 MMC3
• 0x01C13000 USB0 USB2.0 OTG Controller
• 0x01C14000 USB1 USB2.0 HOST Controller
• 0x01C15000 SS
• 0x01C16000 ?HDMI
• 0x01C17000 ?SPI2
• 0x01C18000 SATA
• 0x01C19000 ?PATA
• 0x01C1A000 ?ACE
• 0x01C1B000 ?TVE1
• 0x01C1C000 USB2 USB2.0 HOST Controller
• 0x01C1D000 ?CSI1
• 0x01C1E000 ?TZASC
• 0x01C1F000 ?SPI3
• 0x01C20000 CCM
• 0x01C20400 ?INTC
• 0x01C20800 ?PIO
• 0x01C20C00 TIMER
• 0x01C21000 ?SPDIF
• 0x01C21400 ?AC97
• 0x01C21800 ?IR0
• 0x01C21C00 ?IR1
• 0x01C22400 ?IIS
• 0x01C22800 ?LRADC
• 0x01C22C00 ?AD DA
• 0x01C23000 ?KEYPAD
• 0x01C23400 ?TZPC
• 0x01C23800 ?SID
• 0x01C23C00 ?SJTAG
• 0x01C25000 ?TP
• 0x01C25400 ?PMU
• 0x01C28000 UART0
• 0x01C28400 UART1
• 0x01C28800 UART2
• 0x01C28C00 UART3
• 0x01C29000 UART4
• 0x01C29400 UART5
• 0x01C29800 UART6
• 0x01C29C00 UART7
• 0x01C2A000 ?PS20
• 0x01C2A400 ?PS21
• 0x01C2AC00 ?TWI0
• 0x01C2B000 ?TWI1
• 0x01C2B400 ?TWI2
• 0x01C2BC00 ?CAN
• 0x01C2C400 ?SCR
• 0x01C30000 ?GPS
• 0x01C40000 ?MALI400
• 0x01D00000 ?SRAM C /* VE module sram */
• 0x01E00000 ?DE FE0
• 0x01E20000 ?DE FE1
• 0x01E60000 ?DE BE0
• 0x01E40000 ?DE BE1
• 0x01E80000 ?MP
• 0x01EA0000 ?AVG
• 0x3F500000 ?CSDM /* CoreSight Debug Module*/
• 0x40000000-0xbfffffff 2GB SDRAM
• 0xffff0000-0xffff8fff 32KB ?BROM

SUNXI_CPU_CFG = (SUNXI_TIMER_BASE + 0x13c)

I/O Controllers

• ?SRAMC
• DRAMC
• ?DMA
• NAND
• ?TSI
• ?SPI
• ?MSCC
• ?TVD
• ?CSI
• ?TVE
• EMAC
• ?TCON
• VE
• MMC
• USB
• SS
• ?HDMI
• SATA
• ?PATA
• ?ACE
• ?TZASC
• CCM
• ?INT
• ?PORTC
• ?TIMERC
• ?SPDIF
• ?AC97
• ?IR
• ?IIS
• ?LRADC
• ?ADDA
• ?KEYPAD
• ?TZPC
• ?SID
• ?SJTAG
• ?TP
• ?PMU
• UART
• ?PS2
• ?TWI
• ?CAN
• ?SCR
• ?GPS
• ?MALI
• ?DEFE
• ?DEBE
• ?MP
• ?AVG
• ?BROM
• ?SDRAM

edittemplate A10 registers registered for A10_register_guide/*